Systems and methods for real-time binary analysis with hot patching of programmable logic controllers
US12340211B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2023 |
| Grant date | Jun 24, 2025 |
| Priority date | — |
| Expiry date | Jun 2, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/61
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Described herein are systems and methods for performing real-time binary analysis of code running in programmable logic controllers, and specifically to systems and methods for generating patches, testing patches, and implementing patches on programmable logic controllers while the controller is operating is provided. In one or more examples, a profile of the physical operation controlled by the PLC and the broader system can be generated. In one or more examples, once a profile has been generated, the system and methods described herein can capture data images that provide information regarding the operation of the system as well as the PLC. Based on the received data images, and the generated profile, the system can detect anomalies and/or safety constraint violations in the operation of the system that can be rectified or mitigated through patching (i.e., modification of the datasets or binary code used by the PLC).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.