Memory device for detecting fail cell and operation method thereof
US12340849B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2022 |
| Grant date | Jun 24, 2025 |
| Priority date | — |
| Expiry date | Apr 2, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An operation method of a memory device for programming memory cells to a plurality of program states includes providing a series of program pulses to selected memory cells, performing a first verification operation of verifying a target program state among the plurality of program states, performing, when the first verification operation is passed, a second verification operation of detecting fail cells among the selected memory cells to determine if these memory cells have been overprogrammed. When the number of detected fail cells is greater than or equal to a reference value, the program operation may be terminated for that location and the data may be written to another location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.