Method for fabricating semiconductor device and semiconductor device
US12342524B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2022 |
| Grant date | Jun 24, 2025 |
| Priority date | — |
| Expiry date | Nov 7, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/315
Abstract
A semiconductor structure and a fabricating method are provided. The semiconductor structure includes a substrate, active pillars, gate structures, a metal silicide layer, and a spacer. The active pillars are positioned on the substrate and are arranged in an array, and the active pillars extend along a direction perpendicular to the substrate. The gate structures are arranged at intervals along a first direction, and the gate structures are arranged surrounding a part of the active pillars. The metal silicide layer is positioned on a top surface of the active pillar, and a projection of the metal silicide layer on the substrate is overlapped with a projection of the top surface of the active pillar on the substrate. The spacer is positioned between adjacent gate structures and adjacent active pillars, and a height of the spacer is higher than a height of a top surface of the metal silicide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.