Display apparatus
US12342624B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2023 |
| Grant date | Jun 24, 2025 |
| Priority date | — |
| Expiry date | Feb 27, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6755
Abstract
A display apparatus includes an oxide semiconductor pattern disposed on a device substrate and including a channel region disposed between a source region and a drain region, a gate electrode overlapping the channel region of the oxide semiconductor pattern and having a structure in which a first hydrogen barrier layer and a gate conductive layer are stacked, and a gate insulating film disposed between the oxide semiconductor pattern and the gate electrode to expose the source region and the drain region of the oxide semiconductor pattern. The gate electrode exposes a portion of the gate insulating film that is adjacent to the source region and a portion of the gate insulating film that is adjacent to the drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.