Artificial intelligence hardware with synaptic reuse
US12346796B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 3, 2019 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Apr 12, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G3/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Synaptic reuse allows for a plurality of artificial neurons to be associated with corresponding pluralities of artificial synapses and variable gain amplifiers, to thereby use less space and fewer components to implement and less power to operate than neurons having dedicated paths for each input source. To reduce the likelihood of signal collision, and allow for the independent control and interpretation of input spikes, a router is configured to connect input sources to each of the plurality of artificial neurons in conjunction with a gain configuration controller that is configured to set a gain on each of the plurality of variable gain amplifiers based on a time division schema and an identity of an input source transmitting a spike during a given time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.