One-time-programmable memory devices
US12347504B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jun 2, 2023 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Oct 4, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B20/25
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a memory array comprising a plurality of one-time-programmable (OTP) memory cells. Each of the plurality of OTP memory cells comprises a select transistor, a diode, and a conductor fuse. The diode and the conductor fuse are coupled in series, with the select transistor coupled to a common node between the diode and the conductor fuse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.