Multilayer electronic device
US12347627B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2023 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Feb 28, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/1245
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multilayer electronic device includes an element body including an interior region and an exterior region and a pair of external electrodes. The interior region includes inner dielectric layers and internal electrode layers laminated alternately. The exterior region is disposed outwards from the interior region in a lamination direction. The pair of external electrodes is disposed on a surface of the element body and connected to the internal electrode layers. DRAa<DRAb<DRAc and DRBa>DRBb>DRBc are satisfied, where “RA” includes an element having a highest mole ratio among “RE” in the inner dielectric layers of a third region at a center of the interior region in the lamination direction, “RB” includes an element having a highest mole ratio among “RE” in a first region at a center of the exterior region in the lamination direction, and “RA” and “RB” are different from each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.