Semiconductor device including via structure
US12347768B2 · kind B2 · utility
0Cited by
8References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 6, 2022 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Oct 20, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53266
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate. A wiring layer is over the substrate. A first via structure directly contacts a lower portion of the wiring layer. A second via structure directly contacts an upper portion of the wiring layer. The first via structure generates first stress in the wiring layer. The second via structure generates second stress in the wiring layer. The second stress is of an opposite type to the first stress. The first stress and the second stress compensate for each other in the wiring layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.