Semiconductor package including uneven structures and electronic device including the same
US12347795B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2022 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Oct 24, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30205
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a package board, at least one semiconductor chip disposed on the package board, a molding member disposed on the package board and at least partially surrounding the at least one semiconductor chip, and a heat dissipation member disposed on the at least one semiconductor chip and the molding member. The molding member has first region in which a plurality of uneven structures are disposed, and a second region spaced apart from an external region by the plurality of uneven structures. The plurality of uneven structures protrude to a predetermined height away from the semiconductor chip, the molding member, and the heat dissipation member, and may be formed as a part of the head dissipation member, or formed separately.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.