Output matching circuit with suppressed harmonics
US12348200B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 2024 |
| Grant date | Jul 1, 2025 |
| Priority date | — |
| Expiry date | Apr 22, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Apparatus and methods for power amplifier output matching is disclosed. In one aspect, there is provided an output matching circuit including an input configured to receive an amplified radio frequency signal from a power amplifier, a first output, and a second output. The output matching circuit further includes a first matching circuit electrically connected between the input of the output matching circuit and the first output, the first matching circuit configured to suppress harmonics of a fundamental frequency of the amplified radio frequency signal when the amplified radio frequency signal is within a first band. The output matching circuit further includes a second matching circuit electrically connected between the input of the output matching circuit and the second output, the second matching circuit configured to suppress harmonics of the fundamental frequency of the amplified radio frequency signal when the amplified radio frequency signal is within a second band different from the first band.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.