Adaptive frequency control in integrated circuits
US12353266B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2020 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Jul 27, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This document describes systems and techniques for adaptive frequency control in integrated circuits. In response to operating conditions that permit a lower frequency of a clock signal, the described systems and techniques dynamically reduce the clock frequency without adjusting the frequency of an input clock signal. The clock frequency is decreased by gating a fraction of the input clock signal and stretching the ungated cycles by an offset amount. By dynamically adjusting the clock frequency in this manner, an integrated circuit can change its clock frequency more quickly and maintain the supply voltage closer to a lower voltage limit to reduce power consumption and allow safer operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.