Near-memory computing module and method, near-memory computing network and construction method
US12353346B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2021 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Oct 22, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/54
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a near-memory computing module and method, a near-memory computing network, and a construction method. The near-memory computing module employs a three-dimensional design, computing submodules and a memory submodule are provided in different layers, the layers are connected by means of bonding, and the total data bit width connected is a positive integer multiple of the data bit width of a single computing unit (201). Multiple memory units (203) are provided in the memory submodule, thus allowing a large memory capacity to be implemented in a single memory submodule. Computing units of the computing submodule exchange data with each other via an exchange interface of a router (202); moreover, among the computing submodules data is accessed via a routing interface. The near-memory computing network utilizes the near-memory computing module and satisfies computing requirements of different scales.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.