Patent · US Active

Adjusting instruction execution for enhanced security

US12353886B1 · kind B1 · utility

0Cited by
0References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 9, 2024
Grant dateJul 8, 2025
Priority date
Expiry dateFeb 15, 2044

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/3853
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and techniques are provided for secure computing systems. For example, a process can include obtaining a plurality of instructions, wherein the plurality of instructions comprises a sequential order for execution of the plurality of instructions by a processor. The process can include determining that two or more instructions of the plurality of instructions are capable of being fused. The process can include determining that a random variable satisfies an instruction fusion condition. The process can include executing, based on determining that the two or more instructions of the plurality of instructions are capable of being fused and the random variable satisfies the instruction fusion condition, the two or more instructions of the plurality of instructions as a single fused instruction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.