Image processing circuit performing filtering process on set of pixels to generate set of processed pixels and image processing method
US12354182B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2023 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Apr 4, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T5/70
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An image processing circuit includes a first buffer circuit, a first selector circuit, a processor circuit, a second buffer circuit, and an assigning circuit. The first buffer circuit receives pixels in a sliding window of an image. The first selector circuit outputs the pixels according to a mode signal. The processor circuit performs a first filtering process on the pixels to generate first processed pixels. The assigning circuit transmits the first processed pixels to a back-end circuit or transmits the first processed pixels to the second buffer circuit. When the assigning circuit transmits the first processed pixels to the second buffer circuit, the first selector circuit transmits the first processed pixels to the processor circuit, the processor circuit performs a second filtering process on the first processed pixels to generate second processed pixels, and the assigning circuit transmits the second processed pixels to the back-end circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.