Embedded flash memory and write operation method thereof
US12354663B2 · kind B2 · utility
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8Claims
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Key dates
| Filing date | Feb 10, 2022 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Nov 27, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embedded flash memory and an operation method thereof is provided. The embedded flash memory includes a memory cell array comprising a plurality of memory cells, an automatic verification controller comprising: a TRIM calibration configured to provide a write voltage, and a time controller configured to control a write time, and a high voltage generator configured to provide the write voltage to the memory cell array, an input buffer configured to store input data, a sense amplifier configured to generate read data from the memory cell array, and a data comparator configured to compare the read data with the input data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.