Reset independent glitch filter
US12355439B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 2023 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Mar 13, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A glitch filtering circuit has a counting circuit configured to provide one or more counter output signals indicating whether an input signal has remained in a first signaling state or in a second signaling state for a preconfigured duration of time; a flipflop clocked by a clock signal and configured to provide an output of the glitch filtering circuit; a threshold detect circuit configured to generate a select signal based on the one or more counter output signals; and a multiplexer configured to provide a multiplexed signal to an input of the flipflop, the multiplexed signal having a signaling state that is selected in accordance with the select signal from an input fixed at the first signaling state, an input fixed at the second signaling state and an input that is coupled to the output of the glitch filtering circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.