Fast-locking all-digital phase-locked loop and applications thereof

US12355452B2 · kind B2 · utility

Assignee

• Nordic Semiconductor ASA · NO

Inventors

• Carsten Wulff · Trondheim, NO
• Tor Øyvind Vedal · Trondheim, NO
• Ola Bruset · Trondheim, NO
• Shankkar Balasubramanian · Trondheim, NO
• Ruben Undheim · Trondheim, NO
• Harald Garvik · Trondheim, NO

Key dates

• Filing date: Jun 13, 2022
• Grant date: Jul 8, 2025
• Expiry date: Jul 28, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03L2207/50
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

According to an aspect, there is provided an all-digital phase-locked loop, ADPLL, for a radio receiver, transmitter or transceiver. The ADPLL comprises a time-to-digital converter for generating a digital time signal based on an external reference clock signal and a feedback signal, a switched capacitor digitally controlled oscillator, SC-DCO, for generating a radio frequency signal used as the feed-back signal, a phase-locked loop for controlling the SC-DCO based on the digital time signal for achieving a phase and frequency lock and digital processing means. The digital processing means are configured to maintain, in at least one memory, a lookup table defining a plurality of switching configurations of the SC-DCO corresponding to a plurality of frequencies of the radio frequency signal and to cause the phase-locked loop controller to adjust the switching configuration of the SC-DCO according to the lookup table.