Phase change memory

US12356634B2 · kind B2 · utility

Assignees

• STMicroelectronics SA
• STMicroelectronics (Crolles 2) SAS · FR

Inventors

• Paolo Cappelletti · Seveso, IT
• Fausto Piazza · Grenoble, FR
• Andrea Redaelli · Rogoredo, IT

Key dates

• Filing date: Jul 27, 2022
• Grant date: Jul 8, 2025
• Expiry date: Nov 28, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/841

Abstract

A memory cell includes a substrate with a semiconductor region and an insulating region. A first insulating layer extends over the substrate. A phase change material layer rests on the first insulating layer. The memory cell further includes an interconnection network with a conductive track. A first end of a first conductive via extending through the first insulating layer is in contact with the phase change material layer and a second end of the first conductive via is in contact with the semiconductor region. A first end of a second conductive via extending through the first insulating layer is in contact with both the phase change material layer and the conductive track, and a second end of the second conductive via is in contact only with the insulating region.