Semiconductor device reducing channel length and electronic device with the same
US12356719B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2022 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Aug 8, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/421
Abstract
A semiconductor device and an electronic device are provided. The semiconductor device includes an insulating substrate and a thin film transistor layer. The thin film transistor layer includes a first active layer and a first insulating layer disposed on the first active layer, and a convex portion is formed on the first insulating layer. The thin film transistor layer further includes a second active layer and a third active layer disposed on both sidewalls and an upper surface of the convex portion, one end of the first active layer is connected to the second active layer, and another end of the first active layer is connected to the third active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.