Integrated circuit including standard cells and at least one capacitive filling structure
US12356725B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2022 |
| Grant date | Jul 8, 2025 |
| Priority date | — |
| Expiry date | Jan 17, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/642
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The integrated circuit includes a logic part including standard cells arranged in parallel rows along a first direction and in an alternation of complementary semiconductor wells. Among the standard cells, at least one capacitive filling structure belongs to two adjacent rows and includes a capacitive interface between a conductive armature and the first well, the extent of the second well in the first direction being interrupted over the length of the capacitive filling structure so that the first well occupies in the second direction the width of the two adjacent rows of the capacitive filling structure. A conductive structure electrically connects the second well on either side of the capacitive filling structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.