Integrated current monitor using variable drain-to-source voltages
US12360152B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2023 |
| Grant date | Jul 15, 2025 |
| Priority date | — |
| Expiry date | Jul 27, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2648
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Circuitry and a method of determining electrical characteristics of material local to a specific area of a semiconductor wafer is disclosed. In one embodiment, an IC is disclosed that comprises at least one processing subsystem and at least one integrated common current monitor (ICCM) located within the processing subsystem(s). In one embodiment, the ICCM includes current-to-voltage conversion circuitry that converts a current throughput (IDUT) of a selected at least one of the plurality of DUTs to a corresponding voltage for a plurality of regulated drain-to-source voltages (VDS) across the selected DUT(s). In one embodiment, the ICCM is configured to determine a duty cycle of a voltage that corresponds to the IDUT and IDUT represents electrical characteristics of material local to an area of a semiconductor wafer specific to a location where the ICCM is located.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.