Elementary antenna of the slot-fed patch type and active array antenna
US12362487B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 6, 2023 |
| Grant date | Jul 15, 2025 |
| Priority date | — |
| Expiry date | Dec 10, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01Q23/00
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The elementary antenna 1 includes: two cross-shaped slots 32, 33 defining four half-slots; for each half-slot, excitation striplines 41, 42, the first stripline 41 being connected to a first via 61 and the second stripline 42 being connected to a second via 62; an integrated circuit 70 delivering a plurality of ports; for each half-slot, tracks for feeding the strips, the first track 51 running from a first port 71 to the first via 61 and the second track 52 running from a second port 72 to the second via 62, the first and second ports being two successive ports of the integrated circuit, differentially connected to a transmitter/receiver channel by first and second power lines situated inside the integrated circuit, the lines and tracks running so that there is no crossing of the respective routes thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.