Electronic device provided with a stack of two high electron mobility transistors arranged in a bridge half-arm
US12363932B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 4, 2022 |
| Grant date | Jul 15, 2025 |
| Priority date | — |
| Expiry date | May 28, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/254
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The disclosure concerns an electronic device comprising, stacked from a first surface to a second surface, a first stack and a second stack of two high electron mobility transistors, referred to as first and second transistor, the first and the second stack each comprising, from an insulating layer, interposed between the first and the second stack, a barrier layer and a channel layer, the first and the second transistor respectively comprising a first and a second set of electrodes, the first and the second set of electrodes being each provided with a source electrode, with a drain electrode, and with a gate electrode which are arranged so that the first and the second transistor form a half-arm of a bridge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.