SiC wafer and manufacturing method thereof
US12363973B2 · kind B2 · utility
0Cited by
4References
4Claims
0Family size
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Key dates
| Filing date | Feb 24, 2021 |
| Grant date | Jul 15, 2025 |
| Priority date | — |
| Expiry date | Jul 26, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/66
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A SiC wafer including a SiC substrate and an epitaxial layer formed on the SiC substrate and containing SiC is provided, and a composition ratio of C—Si of an upper surface of the epitaxial layer is 50 atm % or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.