Integrated circuits (IC) chips including throttle request accumulate circuits for controlling power consumed in processing circuits and related methods
US12366905B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2023 |
| Grant date | Jul 22, 2025 |
| Priority date | — |
| Expiry date | Jun 22, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3296
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The processor-based system includes a throttle request accumulate circuit to receive throttle requests, determine a highest or most aggressive throttle value among the throttle requests, and generate a throttle control signal configured to throttle activity in the plurality of processing circuits. Throttle requests have throttle values corresponding to a reduction in activity in at least a portion of the plurality of processing circuits and may correspond to a particular number of cycles of reduced activity in a window of cycles. In addition to reducing response time to local events or conditions compared to waiting for a hierarchical response, the throttle request accumulate circuit accumulates throttle requests from all circuits that adjust or throttle activity in the plurality of processing circuits, and ensures that the net effective throttle controlling activity in the processing circuits at any given time is based on the highest throttle value of those accumulated throttle requests.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.