Method of fabricating electronic apparatus having contact holes penetrating at least one different insulating layer in different regions
US12366945B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2024 |
| Grant date | Jul 22, 2025 |
| Priority date | — |
| Expiry date | Feb 18, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2203/04103
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of fabricating an electronic apparatus including the steps of forming a circuit element on a base substrate, forming a signal line on the base substrate, forming a first insulating layer covering the circuit element and the signal line, forming a display device layer including a light-emitting device on the first insulating layer, forming a first conductive layer on the display device layer, forming a second insulating layer covering the first insulating layer and the first conductive layer, forming a first contact hole penetrating the first and second insulating layers in a first region overlapping with the first conductive layer, forming a second contact hole penetrating the first and second insulating layers in a second region overlapping with an end portion of the signal line, forming a second conductive layer overlapping with the first region, and forming a pad overlapping with the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.