Non-isolated resonant gate drive circuit
US12368371B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2024 |
| Grant date | Jul 22, 2025 |
| Priority date | — |
| Expiry date | Mar 20, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/33592
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A non-isolated resonant gate drive circuit includes a PMOS drive network, an NMOS clamping circuit and an inductor. The PMOS drive network and the NMOS clamping circuit are connected in parallel to two terminals of the inductor. Input signals of the PMOS drive network are provided by a function generator connected to a drive chip, drive signals are output via an output port vgsr1 and an output port vgsr2 after the input signals are processed by the PMOS drive network, the NMOS clamping circuit and the inductor, the NMOS clamping circuit is used for controlling the state of the output port vgsr1 and the output port vgsr2 to change, and the inductor forms LC resonance together with a gate capacitor Cgsr1 and a gate capacitor Cgsr2 in the NMOS clamping circuit to recover energy in a process of turning off the drive circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.