Manufacturing method of semiconductor structure and semiconductor structure
US12369296B2 · kind B2 · utility
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2References
14Claims
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Assignee
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Key dates
| Filing date | Jun 11, 2021 |
| Grant date | Jul 22, 2025 |
| Priority date | — |
| Expiry date | Jan 2, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method includes: providing a substrate, where the substrate includes a complete die region and an incomplete die region; forming a stack on the substrate, where the stack includes sacrificial layers and supporting layers; forming a first photoresist layer on the stack; exposing the first photoresist layer, and developing to remove the first photoresist layer on the incomplete die region; and etching the stack by using the first photoresist layer on the complete die region as a mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.