Logical memory addressing by smart NIC across multiple devices
US12373237B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 2022 |
| Grant date | Jul 29, 2025 |
| Priority date | — |
| Expiry date | Oct 4, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L61/2514
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments provide a method for sending data messages at a network interface controller (NIC) of a computer. From a network stack executing on the computer, the method receives (i) a header for a data message to send and (ii) a logical memory address of a payload for the data message. The method translates the logical memory address into a memory address for accessing a particular one of multiple devices connected to the computer. The method reads payload data from the memory address of the particular device. The method sends the data message with the header received from the network stack and the payload data read from the particular device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.