Patent · US Active

Reporting PCIe device error information

US12373273B2 · kind B2 · utility

0Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 25, 2022
Grant dateJul 29, 2025
Priority date
Expiry dateMay 3, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2213/0026
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An information handling system includes multiple PCIe devices and a basic input/output system (BIOS). The BIOS receive a system management interrupt (SMI). The SMI is in response to a detection of an error on a first PCIe device of the PCIe devices. The BIOS collect data associated with the first PCIe device. The data includes a friendly full device description for the first PCIe device. Based on the friendly full device description, the BIOS determine a friendly name for the PCIe device. The BIOS provide an error message on a display device of the information handling system. The error message includes a type of the error detected and the friendly name for the PCIe device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.