Patent · US Active

High-performance key-value store

US12373440B2 · kind B2 · utility

0Cited by
40References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 1, 2021
Grant dateJul 29, 2025
Priority date
Expiry dateDec 9, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F16/256
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A key-value store is provided, implementing multiple-tiered sorted data structures in memory and storage, including concurrent write buffers in memory, and page-level consolidation of updates on storage, where pages are trivially translated in physical-to-virtual address mapping. The key-value store is built on an indexed sorted data structure on storage, occupying much less storage space and incurring much less disk activity in consolidating updates than a conventional log-structured merge tree organized into files. Concurrent write buffers operate concurrently and independently so that data is committed from memory to storage in an efficient manner, while maintaining chronological sequence of delta pages. Trivial mapping allows mappings of a number of physical pages to be omitted, enabling page mapping tables to occupy less storage space, and simplifying processing workload of read operation retrievals from storage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.