Patent · US Active

System and method for generating a floorplan for a digital circuit using reinforcement learning

US12373627B2 · kind B2 · utility

0Cited by
2References
20Claims
0Family size

Assignee

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Key dates

Filing dateJul 15, 2022
Grant dateJul 29, 2025
Priority date
Expiry dateFeb 14, 2044

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/02
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods and systems for generating a floorplan for a circuit are disclosed. A netlist graph of the circuit and block features associated with blocks of the circuit are obtained. A reinforcement learning (RL) agent is used to generate a sequence of corner block list (CBL) actions. Each CBL action is generated by: generating a current state embedding representing a current state of the floorplan; and inputting the current state embedding to a policy network of the RL agent to generate a predicted output vector, which is used to generate the CBL action. After each CBL action is generated, the current CBL representation of the floorplan and the block features are updated to reflect the state of the floorplan after applying the CBL action. The CBL representation is outputted as a final floorplan after all blocks have been placed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.