Method, system, apparatus, medium, and program for physical design wiring and optimization
US12373629B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2022 |
| Grant date | Jul 29, 2025 |
| Priority date | — |
| Expiry date | Feb 15, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit physical design wiring and optimization method includes, in a first physical design wiring process, performing physical design wiring with a weight of each of one or more signal lines set to a first weight and a weight of a clock line set to a second weight, extracting a violation signal line with a time sequence violation during the first physical design wiring process, and in a second physical design wiring process, reperforming physical design wiring on the violation signal line, a remaining signal line other than the violation signal line, and the clock line with the weight of the violation signal line set to a third weight greater than the first weight. The first weight is less than or equal to the second weight.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.