Pixel luminance for digital display
US12374278B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jul 8, 2024 |
| Grant date | Jul 29, 2025 |
| Priority date | — |
| Expiry date | Jul 8, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2340/0435
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A digital display includes a plurality of pixel rows. For each pixel row, the digital display includes an EM gate driver configured to supply the pixel row with a luminance-controlling signal during each of a plurality of image frames. A luminance controller is configured to instruct the EM gate drivers to supply a pulse-width modulated signal to the plurality of pixel rows. Some pixel rows are supplied with a pulse-width modulated signal starting with an on pulse, and some pixel rows are supplied with a pulse-width modulated signal starting with an off pulse, on the same or different image frames.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.