Degradation-aware training scheme for reliable memristor deep learning accelerator design
US12374394B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2023 |
| Grant date | Jul 29, 2025 |
| Priority date | — |
| Expiry date | Jul 3, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0069
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, a system, and computer program product for degradation-aware training of neural networks are provided. A degradation of degraded memory cells of a memory array is detected, during a training of a neural network. A first set of writing parameter values to be applied to the one or more degraded memory cells and a second set of writing parameter values to be applied to the undegraded memory cells is determined using a model of the memory array tuned to account for the degradation of one or more memory cells. A writing operation is executed, by applying the first set of writing parameter values to the one or more degraded memory cells to compensate for the degradation of the one or more degraded memory cells and by applying the second set of writing parameter values to the undegraded memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.