Semiconductor structure having through substrate via and manufacturing method thereof
US12374602B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2022 |
| Grant date | Jul 29, 2025 |
| Priority date | — |
| Expiry date | Oct 18, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/1058
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a dielectric layer, a conductive pad embedded in the dielectric layer, a semiconductor substrate disposed on the dielectric layer and including a via opening with a notch in proximity to the dielectric layer, a through substrate via (TSV) disposed in the via opening of the semiconductor substrate and extending into the dielectric layer to land on the conductive pad, and a dielectric liner disposed in the via opening of the semiconductor substrate and filling the notch to laterally separate the TSV from the semiconductor substrate. A surface of the dielectric liner facing the TSV is substantially leveled with an inner sidewall of the dielectric layer facing the TSV.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.