Method for normalizing solder interconnects in a circuit package module after removal from a test board
US12376236B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2023 |
| Grant date | Jul 29, 2025 |
| Priority date | — |
| Expiry date | Aug 10, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06572
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for normalizing the solder interconnects (e.g., normalizing the height of the solder ball interconnects) in a circuit package module (e.g., dual-sided mold grid array package module) after removal from a test board includes receiving in a fixture the circuit package module upside down and removably coupling a stencil to the fixture and over the circuit package module. The stencil has a pattern of apertures that coincides with the pattern of solder interconnects of the circuit package module. The method also includes applying solder paste over the stencil to pass through the apertures to add solder paste to the solder interconnects. The method also includes removing the stencil from over the fixture, and removing the circuit package module from the fixture. The circuit package module can be heated to reflow the solder interconnects with the added solder paste.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.