Floor plan generation for device visualization and use
US12380257B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2022 |
| Grant date | Aug 5, 2025 |
| Priority date | — |
| Expiry date | Jul 13, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG10L2015/223
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for floor plan generation for device visualization and use are disclosed. For example, image data may be utilized to segment a building from non-building elements in an image, and the outline of the building may be utilized to generate a floor plan of the building. A user interface may be generated to present the floor plan and allow for placement of representations of walls, doors, windows, and electronic devices within the floor plan. Placement of these elements may be performed in response to input from a user and/or may be performed automatically utilizing naming indicators, device-affinity data, historical usage data, signal-strength data, etc. Once placed, the device representations may be utilized to operate the devices and display related information, such as alerts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.