Coherent receiver with polarization diversity clock detection
US12381631B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 8, 2023 |
| Grant date | Aug 5, 2025 |
| Priority date | — |
| Expiry date | Apr 16, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0075
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A receiver includes an optical front-end and digital circuitry. The optical front-end is configured to receive an optical signal including first and second optical signal components having first and second polarizations and modulated with symbols at a symbol rate. The digital circuitry is configured to derive first and second digital signals representing the first and second optical signal components having the first and second polarizations. The digital circuitry includes a clock detector configured to calculate correlation terms, the correlation terms being calculated in a frequency-domain with a frequency offset commensurate with the symbol rate. The clock detector is configured to recover a clock signal of the symbols by (i) summing selected pairs of the correlation terms, and (ii) calculating or estimating a sum-of-squares of the summed pairs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.