Power semiconductor device with an auxiliary gate structure
US12382651B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2022 |
| Grant date | Aug 5, 2025 |
| Priority date | — |
| Expiry date | Feb 8, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/84
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A heterojunction device having at least three terminals, the at least three terminals comprising a high voltage terminal, a low voltage terminal and a control terminal. The heterojunction device further comprises at least one main power heterojunction transistor, an auxiliary gate circuit comprising at least one first low-voltage heterojunction transistor, a pull-down circuit comprising a capacitor and a charging path for the capacitor. The heterojunction device further comprises at least one monolithically integrated component, wherein the capacitor is configured to provide an internal rail voltage for the at least one monolithically integrated component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.