Semiconductor devices
US12382685B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2022 |
| Grant date | Aug 5, 2025 |
| Priority date | — |
| Expiry date | Apr 19, 2044 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB82Y10/00
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device includes an active region, a plurality of channel layers disposed to be spaced apart from each other in a vertical direction on the active region, a gate structure extending in a second direction to intersect the active region and the plurality of channel layers and surrounding the plurality of channel layers, a source/drain region disposed on the active region on at least one side of the gate structure and contacting the plurality of channel layers, and a contact plug connected to the source/drain region. The source/drain region includes a first epitaxial layer disposed on the active region and extending to contact the plurality of channel layers, second epitaxial layers disposed on the first epitaxial layer, each including impurities in a first concentration, and doping layers stacked alternately with the second epitaxial layers, each including the impurities in a second concentration higher than the first concentration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.