Semiconductor device package
US12382766B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 5, 2019 |
| Grant date | Aug 5, 2025 |
| Priority date | — |
| Expiry date | Nov 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/8506
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment provides a semiconductor device package, the semiconductor device package comprising: a substrate including an electrode disposed on one surface; a metal sidewall disposed on the substrate while surrounding the electrode; a semiconductor device disposed on the electrode; and a light transmitting member disposed on the metal sidewall to cover the semiconductor device, wherein the metal sidewall has the inner surface and the outer surface which are corrugated, and includes: a first metal part disposed on the substrate; a second metal part disposed on the first metal part; and a third metal part disposed on the second metal part, and the inner surface or the outer surface of the metal sidewall includes a recess portion between the second metal part and the third metal part.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.