Gate driving circuit
US12387688B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2024 |
| Grant date | Aug 12, 2025 |
| Priority date | — |
| Expiry date | Mar 19, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving circuit is provided. Each stage of the gate driving circuit includes a first node controller configured to control a voltage level of a first node connected to a gate of a pull-down transistor, and a second node controller configured to control a voltage level of a second node connected to a gate of a pull-up transistor, wherein the first node controller comprises a first circuit and a second circuit, wherein the first circuit is connected between the first node and an input terminal to which a start signal is input, and configured to transfer the start signal to the first node, and the second circuit is connected between the input terminal and the first node, and may be configured to boost a voltage level of a voltage of the first node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.