Current-limiting control strategy for single-loop droop-controlled grid-forming inverters
US12388344B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2023 |
| Grant date | Aug 12, 2025 |
| Priority date | — |
| Expiry date | Apr 30, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/53873
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
This document describes systems and techniques for a current-limiting control strategy for single-loop droop-controlled grid-forming inverters. In aspects, a hysteresis module is configured to compare an output current detected across one or more transistors in an inverter controlled by the single-loop droop converter with a specified maximum current and to generate an overcurrent signal. The overcurrent signal presents a fault signal responsive to the output current exceeding the specified maximum current. A logic array is configured to logically combine gate control signals generated by the single-loop droop controller to selectively direct the one or more transistors to allow the output current to flow therethrough with the overcurrent signal to present modified gate control signals to the one or more transistors. The logic array is configured to replace one or more of the gate control signals in the modified gate control signals with a gate disable signal responsive to the overcurrent signal presenting the fault signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.