Display device having a gate disposed above an active area and a pattern disposed under the active area
US12389773B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2024 |
| Grant date | Aug 12, 2025 |
| Priority date | — |
| Expiry date | Mar 18, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/441
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display device including: a panel including pixels, a pixel including: an LED; a capacitor between a first voltage line and a node; a first transistor between the first voltage line and a first electrode of the LED; a second transistor between a data line and a source of the first transistor; a third transistor between the node and a drain of the first transistor; a fourth transistor between the node and a second voltage line; a fifth transistor between the first voltage line and the source of the first transistor; a sixth transistor between the first electrode and the drain of the first transistor; and a seventh transistor between the second voltage line and the first electrode, the third and fourth transistor including: an active area including metal oxide; first and second gates above the active area; and a pattern below the active area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.