Pixel circuit and driving method thereof, and display panel and driving method thereof
US12394365B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2023 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Dec 8, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/045
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A drive method for a display panel, wherein the display panel includes a plurality of current data lines, a plurality of time-length data lines, a first current selection signal line, a second current selection signal line, a first time-length selection signal line and a second time-length selection signal line, at least one current data line is connected with the first current selection signal line or the second current selection signal line, and at least one time-length data line is connected with the first time-length selection signal line or the second time-length selection signal line; the method includes: providing a valid level signal to the first time-length selection signal line, the second time-length selection signal line, the first current selection signal line and the second current selection signal line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.