Semiconductor device including interconnect structure with metal bridge pattern connecting adjacent metal lines
US12394704B1 · kind B1 · utility
0Cited by
5References
20Claims
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Key dates
| Filing date | Nov 14, 2024 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Nov 14, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53242
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor device which includes: a base layer; a 1st metal line and a 2nd metal extended in a 1st direction and arranged in a 2nd direction, intersecting the 1st direction, in a 1st layer above the base layer; and a bridge metal pattern extended in the 2nd direction to connect the 1st metal line and the 2nd metal line in a 2nd layer immediately above the 1st layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.