Dielectric capacitance recovery of inter-layer dielectric layers for advanced integrated circuit structure fabrication
US12394722B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Dec 22, 2020 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Jan 28, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5386
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication. In an example, an integrated circuit structure includes a single dielectric layer above a substrate. A plurality of conductive lines is in an upper portion of the single dielectric layer above a lower portion of the single dielectric layer. A carbon dopant region is in the upper portion of the single dielectric layer, the carbon dopant region between adjacent ones of the plurality of conductive lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.