Method and system for injection locked divider with frequency calibration
US12395163B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2023 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Oct 31, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/40
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In some implementations, a circuitry may include a series of symmetrical stages with an initial stage in the series coupled to an input signal having a first plurality of phases and an output stage in the series coupling an output signal comprising a second plurality of phases to a calibration engine, where a quantity of the phases in the output signal is increased based at least on a quantity of the symmetrical stages and a quantity of the first plurality of the phases in the input signal. In addition, the circuitry may include implementations, where the calibration engine calibrates a frequency of the circuitry within a range based at least on a target frequency. The circuitry may include implementations, where the calibration engine outputs a current provided to the series, where the output current can be based at least on a calibrated frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.