Patent · US Active

Multiple sample-rate data converter

US12395176B2 · kind B2 · utility

0Cited by
6References
26Claims
0Family size

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Inventors

Key dates

Filing dateJun 21, 2022
Grant dateAug 19, 2025
Priority date
Expiry dateJun 24, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2029/5604
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A test and measurement instrument includes a first data channel including a first data converter operating at a first rate, and a second data channel including a second data converter operating at a second rate that is different than the first rate. Rate controls may include a clock generation circuit. The clock generation circuit includes an intermediate frequency generator structured to generate an intermediate frequency clock from a first clock reference signal, a first frequency clock generator structured to generate a first frequency clock directly from the intermediate frequency clock, and a second frequency clock generator structured to generate a second frequency clock directly from the intermediate frequency clock. The first frequency clock may be used to control the rate of the first data channel, and the second frequency clock may be used to control the rate of the second data channel. Methods are also described.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.